MIPS documentation

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Contents

New standards

Unified Hosting Interface

A standard interface for Bare Metal code to interface with bootloaders, RTOS and debuggers.

UHI_Reference_Manual.pdf

MIPS Architecture

Instruction Set Architecture Quick Reference Guides

MIPS32® Instruction Set Quick Reference

Architecture Programming Publications for MIPS32®

Where more than one version is listed the most recent is first in the list. Hover over the document title to see the version number.

R6

MIPS® Architecture For Programmers Volume II-A: The MIPS32® Instruction Set

MIPS® Architecture for Programmers Volume II-B: microMIPS32™ Instruction Set

R2 to R5

MIPS® Architecture For Programmers Volume I-B: Introduction to the microMIPS32™ Architecture

MIPS® Architecture For Programmers Volume II-A: The MIPS32® Instruction Set

MIPS® Architecture For Programmers Volume II-A: The MIPS32® Instruction Set

MIPS® Architecture For Programmers Volume II-A: The MIPS32® Instruction Set

MIPS® Architecture for Programmers Volume II-B: The microMIPS32™ Instruction Set

MIPS® Architecture For Programmers Vol. III: MIPS32®/microMIPS32™ Privileged Resource Architecture

MIPS® Architecture For Programmers Volume III: The MIPS32® and microMIPS32™ Privileged Resource Architecture

MIPS32® Architecture for Programmers Volume IV-i: Virtualization Module of the MIPS32® Architecture

microMIPS32® Architecture for Programmers Volume IV-i: Virtualization Module of the microMIPS32® Architecture

Architecture Programming Publications for MIPS64®

Where more than one version is listed the most recent is first in the list. Hover over the document title to see the version number.

R6

MIPS® Architecture For Programmers Volume I-A: Introduction to the MIPS64®Architecture

MIPS® Architecture for Programmers Volume II-B: microMIPS64™ Instruction Set

R2 to R5

MIPS® Architecture For Programmers Volume I-A: Introduction to the MIPS64®Architecture

MIPS® Architecture For Programmers Volume I-B: Introduction to the microMIPS64® Architecture

MIPS® Architecture For Programmers Volume I-B: Introduction to the microMIPS64® Architecture

MIPS® Architecture For Programmers Volume II-A: The MIPS64® Instruction Set

MIPS® Architecture for Programmers Volume II-B: The microMIPS64™ Instruction Set

MIPS® Architecture for Programmers Volume II-B: The microMIPS64™ Instruction Set

MIPS® Architecture For Programmers Volume III: The MIPS64® and microMIPS64™ Privileged Resource Architecture

MIPS64® Architecture for Programmers Volume IV-i: Virtualization Module of the MIPS64® Architecture

Architecture Modules

MIPS® Architecture for Programmers Volume IV-f: The MIPS® MT Module for the MIPS32® Architecture

MIPS® Architecture for Programmers VolumeIV-e: The MIPS® DSP Module for the MIPS32® Architecture

MIPS® Architecture for Programmers Volume IV-e: The MIPS® DSP Module for the microMIPS32™ Architecture

MIPS® Architecture for Programmers VolumeIV-e: The MIPS® DSP Module for the MIPS64® Architecture

Architecture Set Extensions

MIPS32® Architecture for Programmers Volume IV-a: The MIPS16e™ Application-Specific Extension to the MIPS32® Architecture

MIPS32® Architecture for Programmers Volume IV-a: The MIPS16e™ Application-Specific Extension to the MIPS32®Architecture

MIPS64® Architecture for Programmers Volume IV-a: The MIPS16e™ Application-Specific Extension to the MIPS64® Architecture

MIPS64® Architecture for Programmers Volume IV-a: The MIPS16e™ Application-Specific Extension to the MIPS64®Architecture

MIPS® Architecture for Programmers Volume IV-h: The MCU Application Specific Extension to the MIPS32® Architecture

MIPS® Architecture for Programmers Volume IV-h: The MCU Application Specific Extension to the microMIPS32™ Architecture

iFlowTrace Specification for the MIPS Architecture

PC and Data Trace Specification for the MIPS Architecture

For Cores with EC32 or EC64 Interface

EJTAG

EJTAG Specification 6.12

EJTAG Specification 6.11

EJTAG Specification 6.10

Application Notes

Efficient DSP ASE Programming in C: Tips and Tricks

Reference Design for MIPS32® M14K™ Cores Application Note

Optimizing Performance, Power, and Area in SoC Designs Using MIPS® Multithreaded Processors

MIPS® cJTAG Adapter User’s Manual

Boot-MIPS: Example Boot Code for MIPS® Cores

Programmed Segmentation Control and Enhanced Virtual Addressing in MIPS32® Architecture Release 3

Enabling HighMem on the Malta™-R Development Board

interAptiv™ Multiprocessing System Datasheet

An Introduction to MIPS32® microAptiv™ Processor Cores - The Convergence of MCU/MPU and DSP

Dev Systems

Malta

Linux for the MIPS® Malta™ Development Platform User’s Guide

Enabling HighMem on the Malta™-R Development Board

Malta (TM) SCHEMATIC

MIPS® Malta™ Errata/Functional Change Sheet

MIPS® Malta™ Developer’s Kit - Getting Started

MIPS® Malta™ Developer’s Kit – Getting Started with Windows® Embedded CE

MIPS® Malta™-R Development Platform User’s Manual

MIPS® Malta™ User’s Manual

Core Cards

MIPS® CORELV™ Specification for the24K® Core Family

CORE_LV™

CoreLV™ Errata / Functional Change Sheet

CoreFPGA3

CoreFPGA™ 3 User’s Manual

Core FPGA (TM) 3 Board Schematics Single FPGA Rev 0

CoreFPGA (TM) 3 Board Schematics Dual FPGA Rev 1.0

CoreFPGA5

MIPS® CoreFPGA™ 5 User’s Manual

Core Lead Vehicles

MIPS32® 4K® LV (4Kc, TI F731940) Specification Update

MIPS32® 4K® LV (4Kc, CSM J25C1) Specification Update

MIPS32® 4K® LV (4Kc, TSMC 4KcH01X01) Specification Update

MIPS64® 5K® LV (5Kc, LSS LJA0004) Specification Update

MIPS64® 5K® LV (5Kc, TSMC 5KcH01X01) Specification Update

MIPS® 4K®/5K® LV (FPGA Module) Specification Update

MIPS® 24Kc™ TSMC.18G Lead Vehicle Datasheet

MIPS® 4K®/5K® Lead Vehicle Datasheet

MIPS64® 5K® LV (5Kc, TI F741763) Specification Update

SEAD 3

MIPS® SEAD™-3 Basic RTL User's Manual

SEAD-3 (TM)

MIPS FPGA MODULE 3

MIPS® SEAD™-3 Board User’s Manual

MIPS® SEAD™-3 Board Getting Started

MIPS® SEAD™-3 IO Processor User’s Manual

Data Sheets

interAptiv™ Multiprocessing System Datasheet


Processor Cores

microAptiv™ Core Family

An Introduction to MIPS32® microAptiv™ Processor Cores - The Convergence of MCU/MPU and DSP

MIPS32® microAptiv™ UC Processor Core Family Software User’s Manual

MIPS32® microAptiv™ UP Processor Core Family Software User’s Manual

interAptiv™ Multiprocessor Core Family

MIPS32® interAptiv™ Multiprocessing System Software User’s Manual


MIPS32® 1074K® Family

MIPS32® 1074K™ Coherent Processing System Datasheet

MIPS32® 1074K™ CPU Family Software User’s Manual

MIPS32® 1004K® Family

Programming the MIPS32® 1004K™ Coherent Processing System Family

MIPS32® 1004K™ Coherent Processing System Datasheet

MIPS32® 1004K™ Coherent Processing System Datasheet

Programming the MIPS32® 24K® Core Family

MIPS® MT Principles of Operation

MIPS32® 74K® Family

MIPS32® 74Kc™ Processor Core Datasheet

MIPS32® 74Kf™ Processor Core Datasheet

MIPS32® 74K™ Processor Core Family Software User’s Manual

Programming the MIPS32® 74K™ Core Family

MIPS32® 34K® Family

MIPS32® 34Kc™ Processor Core Datasheet

MIPS32® 34Kf™ Processor Core Datasheet

MIPS32® 34K® Processor Core Family Software User’s Manual

MIPS® MT Principles of Operation

Programming the MIPS32® 34K™ Core Family

MIPS32® 24K® Family

MIPS32® 24K® Processor Core Family Software User’s Manual

MIPS32® 24Kc™ Processor Core Datasheet

MIPS32® 24Kf™ Processor Core Datasheet

MIPS32® 24KE™ Family

MIPS32® 24KEc™ Processor Core Datasheet

MIPS32® 24KEf™ Processor Core Datasheet

MIPS32® 24KE™ Processor Core Family Software User’s Manual

Programming the MIPS32® 24KE™ Core Family

MIPS32® 4K® Family

MIPS32® 4Kc® Processor Core Datasheet

MIPS32® 4K™ Processor Core Family Software User’s Manual

MIPS32® 4Km® Processor Core Datasheet

MIPS32® 4Kp® Processor Core Datasheet

MIPS32® 4KE™ Family

MIPS32® 4KE® Processor Core Family Software User’s Manual

MIPS32® 4KEc® Processor Core Datasheet

MIPS32® 4KEp® Processor Core Datasheet

MIPS32® M4K™ Core

MIPS32® M4K® Processor Core Datasheet

MIPS32® M4K™ Processor Core Software User’s Manual

MIPS32® M14K™ Core

MIPS32® M14K™ Processor Core Datasheet

MIPS32® M14K™ Processor Core Family Software User’s Manual

MIPS32® M14Kc™ Core

MIPS32® M14Kc ™ Processor Core Datasheet

MIPS32® M14Kc™ Processor Core Software User’s Manual

Legacy Cores

MIPS64® 5K™ Family

MIPS64® 20Kc™ Family

MIPS64™ 20Kc™ TSMC CL018G Processor Core Datasheet

Programming the MIPS64™ 20Kc™ Core

Bus Specification

EC™ Interface Specification

Core Coprocessor Interface Specification

Miscellaneous

Boot-MIPS: Example Boot Code for MIPS® Cores

MIPS32® Presto™ Coherent Processing System Datasheet

Software

MIPS® YAMON™ User’s Manual

MIPS® YAMON™ Reference Manual

MIPS® YAMON™ Errata

MIPS® YAMON™ Errata

YAMON™ Porting Requirements Specification


Whitepapers

Operating Systems

Linux

MIPS OS Remote Processor Driver Whitepaper

Applications

Microcontroller

Brief Introduction to MIPS32® M4K® Core Shadow Registers for Microcontroller Applications

Using the MIPS32® M4K® Processor Core SRAM Interface in Microcontroller Applications

Brief Introduction to MIPS32® M4K® Core Shadow Registers for Microcontroller Applications

An Introduction to the MIPS32® M14K™ Processor Core

An Introduction to the MIPS32® M14Kc™ Processor Core

microMIPS™ Instruction Set Architecture - Uncompromised Performance, Minimum System Cost

Beyond the Hype: MIPS® - the Processor for MCUs

An Introduction to MIPS32® microAptiv™ Processor Cores - The Convergence of MCU/MPU and DSP

Multimedia

The Benefits of Using MIPS® Processors for Consumer Audio Applications

Optimizing the Implementation of Dolby® Digital Plus in SoC Designs

Andriod

MIPS Solutions for GoogleTV

Products

IP Cores

The MIPS32® 24KE™ Core Family: High-Performance RISC Cores with DSP Enhancements

Single Chip Coherent Multiprocessing - The Next Big Step in Performance for Embedded Applications

Architectural Strengths of the MIPS32® 74K™ Core Family

Development Tools

A New Paradigm in Linux Debug - Viosoft

Architecture

ARM to MIPS® Architecture Migration Guide

PPC to MIPS® Architecture Migration Guide

MIPS® SIMD Architecture

Using Virtualization to Implement a Scalable Trusted Execution Environment in Secure SoCs

Hardware-assisted Virtualization with the MIPS® Virtualization Module

MIPS SIMD programming Optimizing multimedia codecs

MIPS® Architecture for Programmers Volume IV-j: The MIPS32® SIMD Architecture Module

MIPS® Architecture for Programmers Volume IV-e: MIPS® DSP Module for MIPS64™ Architecture

MIPS® Architecture for Programmers Volume IV-e: MIPS® DSP Module for microMIPS32™ Architecture

MIPS® Architecture for Programmers Volume IV-e: MIPS® DSP Module for microMIPS64™ Architecture

MIPS® Architecture for Programmers Volume IV-e: MIPS® DSP Module for MIPS32™ Architecture

Technology

Trends & Considerations

Choosing an Intellectual Property Core

Performance: The Future of Embedded Processing

Rapid IP Deployment Speeds Time to Market

The Coming Reality for SOC Designers


Multi-threading/Multiprocessing

Optimizing Performance, Power, and Area in SoC Designs Using MIPS® Multithreaded Processors

Achieving Cache Coherence in a MIPS32® Multicore Design

How to Choose a CPU Core for Multi-CPU SOC Designs

Multi-core and Multi-threaded SoCs Present New Debugging Challenges

New Degrees of Parallelism in Complex SOCs

MIPS® MT Principles of Operation


Smart Card/Secure Methodologies

64-Bit Architecture Speeds RSA By 4x

Securing the Future

Smart Card: The Computer in Your Wallet

DSP

MIPS Technologies MIPS32® 74K Licensable Processor Core

MIPS Technologies MIPS32® M4K Synthesizable Processor Core

Development Tools

Non-intrusive On-chip Debug Hardware Accelerates Development for MIPS RISC Processors

Other

Bus Request-Response Trace for a SMART Interconnect System

How Java Software Solutions Outperform Hardware Accelerators

Archive

R4000™ Microprocessor

MIPS R4000 Micro processor User’s Manual

MIPS R4000MC Errata, Processor Revision 2.2 and 3.0

MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0

MIPS R4000 Slew Rate Control Logic for Output Buffers

MIPS R4000 Synchronization Primitives

R4000 Data Integrity

R4300i™ Microprocessor

R4300i MICROPROCESSOR PRODUCT INFORMATION

R4400® Microprocessor

R4400 MICROPROCESSOR PRODUCT INFORMATION

MIPS R4400MC Errata, Processor Revision 2.0 & 3.0

MIPS R4400PC/SC Errata, Processor Revision 1.0

MIPS R4400PC/SC Errata, Processor Revision 2.0 & 3.0

MIPS R4400Master_Checker Errata, Processor Revision 1.0

R4000™/ R4400® Series Microprocessor

Errata for MIPS R4000/R4400 MicroprocessorUser’s Manual, 2nd. Edition

Errata for MIPS R4000/R4400 MicroprocessorUser’s Manual

VR4000/VR4400 Reset and Initialization Sequence

Design in common for the R4200 (VRX), R4600 (Orion), R4000PC and R4400PC

R5000® Microprocessor

MIPS R5000 Product information